1. Field of the Invention
The present invention relates to a method and apparatus for rapid execution of interrupts after recognition of an interrupt request in a processor having a control unit connected over a bus and control lines and having an external program memory.
2. Description of the Prior Art
Among other things, processors are employed for controlling writing and printing units. A significant requirement which is made of modern writing and printing units is a high writing speed. As a result, considerable drive problems are placed on the processor for the devices employed as writing and printing units. In this connection, mechanical transducers such as matrix printing heads, stepping motors and the like are a few examples. When, for example, the writing unit contains a matrix printing head with which the characters are printed in a dot matrix in the form of a point grid, then, given a writing speed of 800 characters per second and a print format in which a character can be represented in a matrix with 14 printing columns and 16 points per printing column, the chronological spacing of the printing columns is only approximately 90 .mu.s. In order to obtain a presentation pattern with good optical qualities, the requirement is made that the offset of the printing matrix points relative to one another in one printing column of a character on the paper must not be greater than .+-.0.5 mm. Three sub-tolerances which derive from the mechanics of the apparatus, from the amplifier, and from the interrupt execution of the processor, are contained in this overall tolerance of a maximum of .+-.0.5 mm. The tolerance portion which can be attributed to the interrupt execution amounts to approximately 50% of the overall tolerance. So as not to exceed the offset of the printing matrix points relative to one another within a printing column, given an admissible overall tolerance of .+-.0.5 mm on the paper, the impression of a matrix printing point given the specified example must have occurred within a chronological tolerance of a maximum of 25 .mu.s. This means that the interrupt execution, i.e. the data transfer, must be carried out by the processor after recognition of an interrupt request, i.e. in a time span of approximately 12 .mu.s per printing column. A plurality of interrupt requests can occur at any time within this time span. These could, for example, relate to a motor pulse, to a pulse for the drive of the printing head or a movement of the carriage with which the printing head is moved along the recording medium, and can also relate to interface conditions.
Further, different type fonts, for example bi-directional printing inclined to the left and to the right, wide-spaced lettering, pattern printing, condensed lettering, proportional lettering and the like must be possible with a high writing speed. For the realization of all of these type fonts, it is necessary to print the matrix printing points between the printing columns prescribed by the print format as well. Therewith, the requirements made of a very rapid execution of the interrupt after recognition of the interrupt request are further increased. For example, 14 additional intermediate columns are inserted for printing a bidirectional lettering inclined towards the left or towards the right with a printing matrix head having 14 printing columns per character, the time span for the interrupt execution by the processor being thereby reduced to approximately 6 .mu.s.
Given traditional processors, an extensive salvage routine of various control parameters is necessary after the recognition of an interrupt request. As a result, a considerable expense of time occurs between the recognition of an interrupt request and the execution of the interrupt, and this is subject to chronological fluctuation as a function of the type of interrupt in the running program. Approximately 40 .mu.s are required for the so-called skip out of the main program and the return skip into the main program with the standard salvage and reloading routines of relevant control parameters.
Therefore, due to their function structure, traditional processors are not in a position to execute the required interrupts within such short chronological spacings as occur given writing speeds on the specified order. This leads to the fact that the drive of the individual aggregates of the printing unit such as, for example, matrix printing heads, stepping motors having different phase numbers, d.c. motors having timing discs, parallel or serial interfaces, therefore does not occur in a suitable manner with respect to time. A time-suited drive requires that the interrupt must have been executed by the processor in a time span of 6 .mu.s after the interrupt request. It is only then that a presentation pattern with good optical quality is certain to be achieved.
Up to now, a rapid interrupt execution by traditional processors has only been possible when it is distributed in parallel to a plurality of processors. However, the expense connected therewith is considerable.